1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device.
2. Description of the Prior Art
Progressing miniaturization of semiconductor integrated circuit device in recent years narrows a wire-to-wire spacing. This results in a problem that capacitance between wires increases, lowering the propagation velocity of a signal. To reduce the capacitance between the wires, it has been studied to embed an insulating film material having a low dielectric constant between the wires. Meanwhile, it has also been studied to form an air gap between the wires to reduce the capacitance between the wires. A conventional method for forming the air gap disclosed in Patent Document 1 will be described below with reference to the drawings.
First, as illustrated with FIG. 5A, on a surface of a semiconductor substrate 1, an insulating film 2 is formed.
Then, as illustrated with FIG. 5B, photolithography and dry etching are performed to form wiring grooves 3 in an upper portion of the insulating film 2.
Then, as illustrated with FIG. 5C, over the insulating film 2 and inside the wiring grooves 3, a barrier film 4 and a Cu film 5 are sequentially deposited. Then, part of the barrier film 4 and part of the Cu film 5 which are lying outside the wiring grooves 3 are removed by CMP (chemical mechanical polishing) to form lower wires 6.
Then, as illustrated with FIG. 5D, CVD (chemical vapor deposition) or electroless plating is performed for selective growth of a cap film 7 on respective surfaces of the lower wires 6.
Then, as illustrated with FIG. 6A, CVD is performed to deposit a protection film 8 on the insulating film 2 and on the cap film 7 covering the lower wires 6.
Then, as illustrated with FIG. 6B, photolithography is performed to form a patterned resist mask 9 on the protection film 8. The resist mask 9 has an opening in an air gap formation region, and the air gap formation region can be defined by the opening.
Then, as illustrated with FIG. 6C, part of the protection film 8 located in the air gap formation region is removed using the resist mask 9.
Then, as illustrated with FIG. 7A, part of the insulating film 2 located between the lower wires 6 is removed by dry etching using part of the cap film 7 located in the air gap formation region and the resist mask 9 as a mask so that air gap grooves 10 are formed. Then, the resist mask 9 is removed.
Then, as illustrated with FIG. 7B, CVD is performed to deposit an insulating film 11 over the entire surface of the semiconductor substrate 1. This closes upper portions of the air gap grooves 10 with the insulating film 11 before the air gap grooves 10 are filled with the insulating film 11, thereby forming air gaps 12.
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2006-120988